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  ltc3207/ltc3207-1 1 3207fc c1p c1m c2p c2m v bat v bat scl/sda enu camhl cpo uled1-12 cam gnd ltc3207/ltc3207-1 12 main sub cam rgb enable disable low hi i 2 c 3207 ta01 rgb c4 4.7f c1 2.2f dv cc dv cc 0.1f 2 c3 2.2f c2 2.2f typical application features applications description 600ma universal multi-output led/cam driver the ltc ? 3207/ltc3207-1 are highly integrated multi-display led drivers. the device contains a high-ef? ciency, low-noise charge pump to provide power to 12 universal led current sources and one camera led current source. the ltc3207/ ltc3207-1 require only ? ve small ceramic capacitors to form a complete led power supply and current controller. in addition there are two i 2 c addresses available. the display currents are set by an internal precision cur- rent reference. independent dimming, on/off, blinking and gradation control for all universal current sources is achieved via the i 2 c serial interface. 6-bit linear dacs are available for adjusting brightness levels for each universal led current source. the cam current source has a 4-bit linear dac to adjust brightness. the ltc3207/ltc3207-1 charge pumps optimize ef? ciency based on the voltage across the led current sources. the device powers-up in 1x mode and will automatically switch to boost mode whenever any enabled led current source begins to enter dropout. the ? rst dropout switches the ic into 1.5x mode and a subsequent dropout switches the ltc3207/ltc3207-1 into 2x mode. the device resets to 1x mode whenever a data register is updated via the i 2 c port. 4-led main, 2-led sub, dual rgb and camera light low noise, multi-mode charge pump (1x, 1.5x, 2x) provides up to 91% ef? ciency slew limited switching reduces conducted and radiated noise (emi) up to 600ma total output current twelve 28ma universal current sources with 64-step linear brightness control 425ma cam led current source with 16-step linear brightness control and 2-second high current safety timer independent on/off, brightness level, blinking and gradation control for each current source using 2-wire i 2 c tm interface internal current reference two i 2 c addresses are available (ltc3207 00110110, ltc3207-1 00110100) con? gurable enu pin for asynchronous led on/off control automatic or forced mode switching internal soft-start limits inrush current short-circuit/thermal protection 4mm 4mm 24-pin qfn plastic package video phones with qvga + displays , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. protected by u.s. patents, includin g 6411531.
ltc3207/ltc3207-1 2 3207fc pin configuration electrical characteristics absolute maximum ratings v bat , dv cc , cpo ........................................... C0.3v to 6v uled1 to uled12, cam .............................. C0.3v to 6v sda, scl, enu, camhl .............C0.3v to (dv cc + 0.3v) i cpo continuous (note 3) ........................................350ma pulsed at 10% duty cycle ................................600ma i cam continuous (note 3) ........................................300ma pulsed at 10% duty cycle ................................460ma cpo short-circuit duration .............................. inde? nite operating temperature range (note 2).... C40c to 85c storage temperature range ................... C65c to 125c (notes 1, 4) parameter conditions min typ max units v bat operating voltage 2.9 5.5 v i vbat operating current i cpo = 0, 1x mode i cpo = 0, 1.5x mode i cpo = 0, 2x mode 0.5 2.9 4.1 ma ma ma dv cc uvlo threshold 1v dv cc operating voltage 1.5 5.5 v v bat uvlo threshold 1.5 v v bat shutdown current 3.2 7 a dv cc shutdown current 1a universal led current, 6-bit linear dacs, uled = 1v full-scale led current 24.2 27.5 31 ma minimum (1lsb) led current 0.436 ma 24 23 22 21 20 19 7 8 9 top view uf package 24-lead (4mm 4mm) plastic qfn 10 11 12 6 5 4 3 2 1 13 14 15 16 17 18 cpo uled1 uled2 uled3 uled4 uled5 uled1 2 uled1 1 uled1 0 uled9 uled8 uled7 c1p c2p enu v bat c1m c2m cam camhl dv cc scl sda uled6 25 t jmax = 125c, ja = 40c/w exposed pad (pin 25) is gnd, must be soldered to pcb the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v bat = 3.6v, dv cc = 3v, enu = hi, camhl = lo, c1 = c2 = c3 = 2.2 f, c4 = 4.7 f, unless otherwise noted. lead free finish tape and reel part marking package description temperature range ltc3207euf#pbf ltc3207euf#trpbf 3207 24-lead (4mm 4mm) plastic qfn C40c to 85c ltc3207euf-1#pbf ltc3207euf-1#trpbf 32071 24-lead (4mm 4mm) plastic qfn C40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ order information
ltc3207/ltc3207-1 3 3207fc parameter conditions min typ max units led current matching any two outputs, 50% of fs 2 % led dropout voltage i led = fs 180 mv blink rate period reg15, d6 and d7 1.25 2.5 s s uled up/down gradation times reg15, d4 and d5 0.24 0.48 0.96 0.45 0.9 1.8 s s s s s s v ol general purpose output mode (gpo) i out = 1ma, single output enabled 7 mv cam led current, 4-bit linear dac, cam = 1v full-scale led current 425 ma minimum (1lsb) led current 29 ma led dropout voltage i led = fs 450 mv high current safety timer high current mode 2.1 s charge pump (cpo) 1x mode output impedance 0.6 1.5x mode output impedance v bat = 3v, v cpo = 4.2v (note 5) 3.6 2x mode output impedance v bat = 3v, v cpo = 4.8v (note 5) 4.1 cpo regulation voltage 1.5x mode, i cpo = 20ma 2x mode, i cpo = 20ma 4.55 5.05 v v clock frequency 0.65 0.85 1.05 mhz sda, scl, enu, camhl v il 0.3 ? dv cc v v ih 0.7 ? dv cc v i ih sda, scl, enu, camhl = dv cc C1 1 a i il sda, scl, enu, camhl = 0v C1 1 a v ol digital output low (sda) i pullup = 3ma 0.12 0.4 v serial port timing (notes 6, 7) t scl clock operating frequency 400 khz t buf bus free time between stop and start condition 1.3 s t hd,sta hold time after (repeated) start condition 0.6 s t su,sta repeated start condition setup time 0.6 s t su,sto stop condition setup time 0.6 s t hd,dat(out) output data hold time 0 900 ns t hd,dat(in) input data hold time 0 ns t su,dat data setup time 100 ns t low clock low period 1.3 s t high clock high period 0.6 s electrical characteristics the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v bat = 3.6v, dv cc = 3v, enu = hi, camhl = lo, c1 = c2 = c3 = 2.2 f, c4 = 4.7 f, unless otherwise noted.
ltc3207/ltc3207-1 4 3207fc temperature (c) C40 switch resistance () 0.55 0.60 0.65 35 85 3207 g04 0.50 0.45 0.40 C15 10 60 0.70 0.75 0.80 i cpo = 200ma v bat = 3.3v v bat = 3.6v v bat = 3.9v temperature (c) C40 open loop output resistance () 3.7 4.1 4.5 60 3.3 2.9 3.5 3.9 4.3 3.1 2.7 2.5 C15 10 35 85 v bat = 3v v cpo = 4.2v c2 = c3 = 2.2f c4 = 4.7f 3207 g05 i cpo (ma) 0 cpo voltage (v) 4.6 4.8 400 3207 g06 4.0 4.4 4.2 3.8 3.6 100 200 300 500 c2 = c3 = 2.2f c4 = 4.7f 3.6v 3.5v 3.4v 3.3v 3.2v 3.1v v bat = 3v 200s/div v cpo 1v/div 3207 g01 v bat = 3.6v 1.5x 2x 1x 500ns/div v cpo 20mv/div ac coupled 3207 g02 v bat = 3.6v i cpo = 200ma c cpo = 4.7f 500ns/div v cpo 20mv/div ac coupled 3207 g03 v bat = 3.6v i vcpo = 200ma c cpo = 4.7f typical performance characteristics mode switch dropout times 1.5x mode cpo ripple 2x mode cpo ripple 1x mode switch resistance vs temperature 1.5x mode charge pump open-loop output resistance vs temperature (1.5v bat -v cpo )/i cpo 1.5x mode cpo voltage vs i cpo t a = 25c unless otherwise noted electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltc3207e/ltc3207e-1 are guaranteed to meet performance speci? cations from 0c to 85c. speci? cations over the C40c to 85c ambient operating temperature range are assured by design, characterization and correlation with statistical process controls. note 3: based on long term current density limitations. assumes operating duty cycle of <10% under absolute maximum conditions for durations less than 10 seconds. note 4: this ic includes overtemperature protection that is intended to protect the device during momentary overload conditions. junction temperature will exceed 125c when overtemperature protection is active. continuous operation above the speci? ed maximum operating junction temperature may result in device degradation or failure. note 5: 1.5x mode output impedance is de? ned as (1.5v bat C v cpo )/i out . 2x mode output impedance is de? ned as (2v bat C v cpo )/i out . note 6 : all values are referenced to v ih and v il levels. note 7: guaranteed by design. parameter conditions min typ max units t f clock data fall time 20 300 ns t r clock data rise time 20 300 ns t sp spike suppression time 50 ns the denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v bat = 3.6v, dv cc = 3v, enu = hi, camhl = lo, c1 = c2 = c3 = 2.2 f, c4 = 4.7 f, unless otherwise noted.
ltc3207/ltc3207-1 5 3207fc i cpo (ma) 0 v bat current (ma) 25 3207 g13 20 10 15 5 0 200 100 400 300 600 500 v bat = 3.6v v bat voltage (v) 2.9 v bat shutdown current (a) 5.5 6.5 7.5 4.1 4.9 3207 g10 4.5 3.5 3.3 3.7 4.5 5.3 2.5 1.5 t a = 85c t a = C40c t a = 25c v bat voltage (v) 2.7 v bat current (a) 480 490 500 5.1 3207 g11 470 460 475 485 495 465 455 450 3.3 3.0 3.9 3.6 4.5 4.8 5.4 4.2 i cpo (ma) 0 v bat current (ma) 15 20 400 3207 g12 10 5 0 100 200 300 500 v bat = 3.6v cam pin voltage (v) 0.0 cam pin current (ma) 300 400 450 0.8 3207 g14 200 100 250 350 150 50 0 0.2 0.4 0.6 1.0 v bat = 3.6v input code (hex) 0 0 cam led current (ma) 50 150 200 250 6789 450 3207 g15 100 12345 a bcde f 300 350 400 typical performance characteristics v bat shutdown current vs v bat voltage 1x mode no load v bat current vs v bat voltage 1.5x mode v bat current vs i cpo (iv bat - 1.5i cpo ) 2x mode v bat current vs i cpo (iv bat -2i cpo ) cam pin current vs cam pin voltage cam led current vs input code t a = 25c unless otherwise noted temperature (c) C40 open loop output resistance () 4.2 4.6 5.0 60 3207 g07 3.8 3.4 4.0 4.4 4.8 3.6 3.2 3.0 C15 10 35 85 v bat = 3v v cpo = 4.8v c2 = c3 = 2.2f c4 = 4.7f i cpo (ma) 0 cpo voltage (v) 4.8 5.0 5.2 400 3207 g08 4.6 4.4 4.7 4.9 5.1 4.5 4.3 4.2 100 200 300 500 c2 = c3 = 2.2f c4 = 4.7f 3.6v 3.5v 3.4v 3.3v 3.2v 3.1v v bat = 3v v bat voltage (v) 2.9 frequency (khz) 875 4.1 4.9 3207 g09 850 825 3.3 3.7 4.5 5.3 800 775 t a = 85c t a = C40c t a = 25c 2x mode cpo voltage vs i cpo oscillator frequency vs v bat voltage 2x mode charge pump open-loop output resistance vs temperature (2v bat -v cpo )/i cpo
ltc3207/ltc3207-1 6 3207fc cam pin current (ma) 50 cam pin dropout voltage (mv) 500 3207 g16 400 200 300 100 0 150 100 250 200 350 400 300 v bat = 3.6v uled pin voltage (v) 0 uled pin current (ma) 10 20 30 5 15 25 0.06 0.12 0.18 0.24 3207 g17 0.30 0.00 v bat = 3.6v input code (hex) 0 16 20 28 1c 2e 3207 g18 12 8 0a 113 25 37 3f 4 0 24 uled current (ma) cam pin dropout voltage vs cam pin current uled pin current vs uled pin voltage uled current vs input code uled pin current (ma) 0 0 uled pin dropout voltage (mv) 20 60 80 100 14 16 20 18 22 180 3207 g19 40 24 8 61012 28 26 24 120 140 160 v bat = 3.6v v bat voltage (v) 3.0 cam efficiency (pled/pin) (%) 60 80 100 5.0 3207 g20 40 20 50 70 90 30 10 0 3.5 4.0 4.5 5.5 300ma led current (typ v f at 300ma = 3.6v, aot-2015hpw) v bat voltage (v) 3.0 uled efficiency (pled/pin) (%) 60 80 100 5.0 3207 g21 40 20 50 70 90 30 10 0 3.5 4.0 4.5 5.5 12 leds at 15ma/led (typ v f at 15ma = 3.2v, nichia nscw100) typical performance characteristics uled pin dropout voltage vs uled pin current cam ef? ciency vs v bat voltage 12-led uled display ef? ciency vs v bat voltage pin functions cpo (pin 1): output of the charge pump. used to power all leds. a 4.7f x5r or x7r ceramic capacitor should be connected to ground. uled1-uled12 (pins 2-6,12-18): current source outputs for driving leds. the led current can be set from 0ma to 27.5ma in 64 steps via software control and internal 6-bit linear dac. each output can be disabled by setting the associated data register reg1 to reg12 low. uled1 to uled12 can also be used as i 2 c controlled open-drain general purpose outputs. connect unused outputs to ground. cam (pin 7): current source output for the cam display white led. the led on the cam display can be set from 0ma to 425ma in 16 steps via software control and in- ternal 4-bit linear dac. two 4-bit registers are available. one is used to program the high camera current and the second the low camera current. these registers can be selected via the serial port or the camhl pin. the output can be disabled by setting data in reg13 low. a safety timer will disable the output after two seconds whenever the high camera current mode is selected (see applica- tions information). t a = 25c unless otherwise noted
ltc3207/ltc3207-1 7 3207fc block diagram C + 21 C + 1.22v v bat 22 enu 8 camhl 9 dv cc 11 sda 10 scl 24 20 23 19 1 c1p c1m c2p c2m cpo 25 gnd 2 3 850khz oscillator control logic master/slave reg shift register cam current source 2 second safety timer charge pump 12 universal current sources and dacs 4 5 6 12 13 12 14 15 uled1 uled2 uled3 uled4 uled5 uled6 uled7 uled8 uled9 16 uled10 17 uled11 18 uled12 7 cam 3207 bd pin functions camhl (pin 8): selects cam high register when asserted high and cam low register when low. the high to low transition automatically resets the charge pump mode to 1x. the logic level for camhl is referenced to dv cc . if unused, the pin should be connected to ground. dv cc (pin 9): supply voltage for all digital i/o lines. this pin sets the logic reference level of the device. dv cc will reset the data registers when set below the undervoltage lockout threshold which is the recommended method for resetting the part after power up. a 0.1f x5r or x7r ceramic capacitor should be connected to ground. scl (pin 10): i 2 c clock input. the logic-level for scl is referenced to dv cc . sda (pin 11): input data for the serial port. serial data is shifted in one bit per clock to control the device. the logic-level is referenced to dv cc . c1p , c2p , c1m, c2m (pin 24, 23, 20, 19): charge pump flying capacitor pins. a 2.2f x7r or x5r ceramic ca- pacitor should be connected from c1p to c1m and c2p to c2m. v bat (pin 21): supply voltage for the entire device. this pin must be bypassed with a single 2.2f low esr ceramic capacitor. enu (pin 22): input. used to enable or disable the prese- lected uled outputs. when the pin is toggled from low (disable) to high (enable), the device illuminates the prese- lected leds. when enu is controlling selected outputs and other outputs have been enabled the charge pump mode will be reset to 1x on the falling edge of enu. when enu is controlling selected outputs and no other outputs are active the part will go from enabled to shutdown. the enu logic-level is referenced to dv cc . this pin is connected to ground if unused. exposed pad (pin 25): ground. the exposed pad must be soldered to pcb ground.
ltc3207/ltc3207-1 8 3207fc operation power management the ltc3207/ltc3207-1 use a switched capacitor charge pump to boost cpo to as much as two times the input voltage up to 5.05v. the part starts up in 1x mode. in this mode, v bat is connected directly to cpo. this mode provides maximum ef? ciency and minimum noise. the ltc3207/ltc3207-1 will remain in 1x mode until an led current source drops out. dropout occurs when a current source voltage becomes too low for the programmed current to be supplied. when dropout is detected, the ltc3207/ltc3207-1 will switch into 1.5x mode. the cpo voltage will then start to increase and will attempt to reach 1.5x v bat up to 4.55v. any subsequent dropout will cause the part to enter the 2x mode. the cpo voltage will attempt to reach 2x v bat up to 5.05v. a 2-phase non-overlapping clock activates the charge pump switches. in the 2x mode, the ? ying capacitors are charged on alternate clock phases from v bat to minimize cpo voltage ripple. in 1.5x mode the ? ying capacitors are charged in series during the ? rst clock phase and stacked in parallel on v bat during the second phase. this sequence of charging and discharging the ? ying capacitors continues at a constant-frequency of 850khz. the current delivered by each led current source is con- trolled by an associated dac. each dac is programmed via the i 2 c port. soft-start initially, when the part is in shutdown, a weak switch connects v bat to cpo. this allows v bat to slowly charge the cpo output capacitor and to prevent large charging currents from occurring. the ltc3207/ltc3207-1 also employ a soft-start feature on its charge pump to prevent excessive inrush current and supply droop when switching into the step-up modes. the current available to the cpo pin is increased linearly over a typical period of 125s. soft-start occurs at the start of both 1.5x and 2x mode changes. charge pump strength when the ltc3207/ltc3207-1 operate in either 1.5x mode or 2x mode, the charge pump can be modeled as a thevenin-equivalent circuit to determine the amount of current available from the effective input voltage and ef- fective open-loop output resistance, r ol (figure 1). r ol is dependent on a number of factors, including the switching term, 1/(2f osc ? c fly ), internal switch resist- ances and the non-overlap period of the switching circuit. however, for a given r ol , the amount of current available will be directly proportional to the advantage voltage of 1.5v bat C cpo for 1.5x mode and 2v bat C cpo for 2x mode. consider the example of driving leds from a 3.1v supply. if the led forward voltage is 3.8v and the current sources require 100mv, the advantage voltage for 1.5x mode is 3.1v ? 1.5 C 3.8v C 0.1v or 750mv. notice that if the input voltage is raised to 3.2v, the advantage voltage jumps to 900mv, a 20% improvement in available strength. from figure 1, for 1.5x mode the available current is given by: i vv r out bat cpo ol = ? 15 . (1) for 2x mode, the available current is given by: i vv r out bat cpo ol = ? 2 (2) notice that the advantage voltage in this case is 3.1v ? 2 C 3.8v C 0.1v = 2.3v. r ol is higher in 2x mode but a sig- ni? cant overall increase in available current is achieved. C + cpo 1.5v bat or 2v bat + C 3207 f01 r ol figure 1. equivalent open-loop
ltc3207/ltc3207-1 9 3207fc mode switching the ltc3207/ltc3207-1 will automatically switch from 1x mode to 1.5x mode and subsequently to 2x mode whenever a dropout condition is detected at an led pin. dropout occurs when an active current source voltage becomes too low for the programmed current to be sup- plied. the mode change will not occur unless dropout has existed for approximately 400s. this delay will allow the leds to warm up and achieve the ? nal led forward voltage value. the mode will automatically switch back to 1x whenever a register is updated via the i 2 c port, when gradation completes ramping down, on the falling edge of either enu or camhl and after each blink period. the part can be forced to operate in 1x, 1.5x or 2x mode by writing the appropriate bits into reg0. this feature may be used for powering loads from cpo. nonprogrammed current sources do not affect dropout. in addition, enu controlled current sources do not affect dropout when enu is low. universal current sources (uled1 to uled12) there are twelve universal 27.5ma current sources. each current source has a 6-bit linear dac for current control. the output current range is 0 to full-scale in 64 steps. each current source is disabled when an all zero data word is written. the supply current for that source is reduced to zero. connect unused outputs to ground. uled1 to uled12 can also be used as general purpose outputs (gpo). current sources in the gpo mode can be used as i 2 c controlled open-drain drivers. the gpo mode is selected by programming reg1 to reg12, bit 6 and bit 7 to a logic one. in the gpo mode dropout detection is disabled, output swings to ground will not cause mode switching. camera current source there is one cam current source. this current source has a 4-bit linear dac for current control. the output current range is 0ma to 425ma in 16 steps. the current source is disabled when this section receives an all zero data word. the supply current for the current source is reduced to zero. camhl the camhl pin quickly selects the camera high register for ? ash applications without re-accessing the i 2 c port. when low, the cam current range will be controlled by the camera low 4-bit register. when camhl is asserted high, the current range will be set by the camera high 4-bit register. the charge pump mode will be reset to 1x on the falling edge of camhl. a safety timer will disable the cam output after two sec- onds whenever the high current mode is selected. to reset the safety timer, the camhl signal from the external pin or through the i 2 c port is set low. alternatively the cam register can be written to all zeroes. if unused, the pin should be connected to ground. blinking each universal output (uled1 to uled12) can be set to blink 0.156s or 0.625s with a period of 1.25s or 2.5s via the i 2 c port. the blinking rate is selected via reg15 and uled outputs are selected via reg1 to reg12. blinking and gradation rates are independent. blink resets the charge pump to 1x mode after each period. please refer to ap- plication note 108 for detailed information and examples on programming blinking. gradation universal led outputs uled1 to uled12 can be set to have the current ramp up and down at 0.24s, 0.48s and 0.96s rates via the i 2 c port. the total gradation period is longer than the ramp time since there is a region at the start and end where the uled current does not change. a new gradation period cannot be started until after the previous gradation period has ended. each of these outputs can have either blinking or gradation enabled. the grada- tion time is set via reg15 and uled outputs are selected via reg1 to reg12. the ramp direction is controlled via reg0. setting the up bit high causes gradation to ramp up; setting this bit low causes gradation to ramp down. please refer to application note 108 for detailed informa- tion and examples on programming gradation. operation
ltc3207/ltc3207-1 10 3207fc when gradation is disabled the led output current remains at the programmed value. the gradation enable bit must be cleared when the gradation timer is disabled. the charge pump mode is reset to 1x after gradation completes ramping down. external enable control (enu) the enu pin can be used to enable or disable the ltc3207/ ltc3207-1 without reaccessing the i 2 c port. this might be useful to indicate an incoming phone call without waking the micro-controller. enu can be programmed to indepen- dently control all preselected displays. led displays are controlled with enu by setting the appropriate data bits in reg1 to reg12 and control bits in reg14 and reg15. to use the enu pin, the i 2 c port must ? rst be con? gured to select the desired led outputs. when enu is high, the selected displays will be enabled as per the reg14 and reg15 settings. when enu is low, the selected displays will be off. if no other displays are programmed to be enabled, the chip will be in shutdown. gradation can also be preprogrammed for control by the enu pin. the registers are written as required per the gradation description and the up bit is ignored. the registers are programmed when enu is low. when enu is set high the part will become enabled and the selected led outputs will ramp up. when enu is set low the selected led outputs will ramp low to zero current and then the part will shut down. the charge pump must be in auto mode if shutdown is required. if the enu pin is not used, it is connected to ground. if enu is used and other uled outputs are active then enu will reset the charge pump mode to 1x on the falling edge. please refer to application note 108 for detailed informa- tion and examples on programming enu control. shutdown current shutdown occurs when all the current source data bits have been written to zero, when dv cc is set below the undervoltage lockout voltage or when enu switches low (all other outputs disabled). the charge pump must also be in auto mode. although the ltc3207/ltc3207-1 are designed to have very low shutdown current, they will draw about 3.5a from v bat when in shutdown. internal logic ensures that the device is in shutdown when dv cc is low. note, however, that all of the logic signals that are referenced to dv cc (scl, sda, enu and camhl) will need to be at dv cc or below (i.e., ground) to avoid violation of the absolute maximum speci? cations on these pins. emi reduction the ? ying capacitor pins c1m, c1p , c2m and c2p have controlled slew rates, in the 5ns to 10ns range, to reduce conducted and radiated noise. serial port the microcontroller-compatible i 2 c serial port provides all of the command and control inputs for the ltc3207/ ltc3207-1. data on the sda input is loaded on the rising edge of scl. d7 is loaded ? rst and d0 last. there are 16 data registers, one address register and one sub-address register. once all address bits have been clocked into the address register, acknowledge occurs. the sub-address register is then written, followed by writing the data register. each data register has a sub-address. after the data register has been written, a load pulse is created after the stop bit. the load pulse transfers all of the data held in the data registers to the dac registers. the stop bit can be delayed until all of the data master registers have been written. at this point the led current will be changed to the new settings. the serial port uses static logic registers so there is no minimum speed at which it can be operated. i 2 c interface the ltc3207/ltc3207-1 communicate with a host (master) using the standard i 2 c 2-wire interface. the timing diagram (figure 3) shows the timing relationship of the signals on the bus. the two bus lines, sda and scl, must be high when the bus is not in use. external pull-up resistors or current sources, such as the ltc1694 smbus acceler- ator, are required on these lines. operation
ltc3207/ltc3207-1 11 3207fc the ltc3207/ltc3207-1 are receive-only (slave) devices. there are two i 2 c addresses available. the ltc3207 i 2 c address is 00110110 and the ltc3207-1 i 2 c address is 00110100. the i 2 c address is the only difference between the ltc3207 and the ltc3207-1. write word protocol used by the ltc3207/ltc3207-1 1711 81811 s slave address wr a *sub-address a data byte a p** s = start condition, wr = write bit = 0, a = acknowledge, p = stop condition *the sub-address uses only the ? rst four bits, d0, d1, d2 and d3 **stop can be delayed until all of the data registers have been written bus speed the i 2 c port is designed to be operated at speeds of up to 400khz. it has built-in timing delays to ensure correct operation when addressed from an i 2 c compliant master device. it also contains input ? lters designed to suppress glitches should the bus become corrupt. figure 2. bit assignments ack 123 address wr 456789123456789123456789 00110 110 00110100 s7 s6 s5 s4 s3 s2 s1 s0 76543210 ack stop start sda scl ack address ltc3207-1 ltc3207 wr 00110110 s7 s6 s5 s4 s3 s2 s1 s0 76543210 sub-address data byte 3207 fo2 t su, dat t hd, sta t hd, dat sda scl t su, sta t hd, sta t su, sto 3207 f03 t buf t low t high start condition repeated start condition stop condition start condition t r t f t sp figure 3. timing parameters sub-address byte msb lsb 7 6543210r egister function x x x x 0 0 0 0 reg0 command x x x x 0 0 0 1 reg1 uled1 x x x x 0 0 1 0 reg2 uled2 x x x x 0 0 1 1 reg3 uled3 x x x x 0 1 0 0 reg4 uled4 x x x x 0 1 0 1 reg5 uled5 x x x x 0 1 1 0 reg6 uled6 x x x x 0 1 1 1 reg7 uled7 x x x x 1 0 0 0 reg8 uled8 x x x x 1 0 0 1 reg9 uled9 x x x x 1 0 1 0 reg10 uled10 x x x x 1 0 1 1 reg11 uled11 x x x x 1 1 0 0 reg12 uled12 x x x x 1 1 0 1 reg13 cam x x x x 1 1 1 0 reg14 enu x x x x 1 1 1 1 reg15 g/b/enu operation
ltc3207/ltc3207-1 12 3207fc register sub-address = 0000 msb lsb d7 d6 d5 d4 d3 d2 d1 d0 camhl reserved reserved reserved force2x force1p5 quick write up up 0 1 gradation counts down gradation counts up quick write 0 1 normal write to each register quick write, reg1 data is written to all twelve universal registers force1p5 1 0 forces charge pump into 1.5x mode enables mode logic to control mode charges based on dropout signal force2x 1 0 forces charge pump into 2x mode. enables mode logic to control mode changes based on dropout signal force1x d2 (force1p5x) = 1 d3 (force2x) = 1 } forces charge pump into 1x mode reserved x reserved x reserved x camhl 0 1 external control of cam i 2 c control of cam sub-address 0001 to 1100 per sub-address table above uled mode enable bits led current data msb lsb bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 normal blink enabled gradation enabled gpo mode (gradation/blink/dropout off) 0 0 1 1 0 1 0 1 d5 d5 d5 d5 d4 d4 d4 d4 d3 d3 d3 d3 d2 d2 d2 d2 d1 d1 d1 d1 d0 d0 d0 d0 data bytes reg1 to reg12, universal led 6-bit linear dac data with blink/gradation. operation reg0, command byte .
ltc3207/ltc3207-1 13 3207fc register sub-address = 1101 msb high bits lsb msb low bits lsb bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 d3 d2 d1 d0 d3 d2 d1 d0 reg13, camera led 4-bit high and 4-bit low dac data. reg15, enu, gradation and blink times setting bits 0 high to 3 high selects the outputs to be controlled by enu. bits 4 to 7 control gradation and blink times. sub-address = 1111 blink times and period gradation ramp times and period d7 d6 blink period d5 d4 ramp period 0 0 1 1 0 1 0 1 0.625s 0.156s 0.625s 0.156s 1.25s 1.25s 2.5s 2.5s 0 0 1 1 0 1 0 1 disabled 0.24s 0.48s 0.96s disabled 0.45s 0.9s 1.8s register sub-address = 1110 msb lsb bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 uled8 uled7 uled6 uled5 uled4 uled3 uled2 uled1 reg14, enu setting bit high selects the outputs to be controlled by enu. register sub-address = 1111 enu output selection lsb 3210 uled12 uled11 uled10 uled9 start and stop conditions a bus-master signals the beginning of a communication to a slave device by transmitting a start condition. a start condition is generated by transitioning sda from high to low while scl is high. when the master has ? nished communicating with the slave, it issues a stop condition by transitioning sda from low to high while scl is high. the bus is then free for communication with another i 2 c device. byte format each byte sent to the ltc3207/ltc3207-1 must be 8 bits long followed by an extra clock cycle for the acknowledge bit to be returned by the ltc3207/ltc3207-1. the data should be sent to the device most signi? cant bit (msb) ? rst. operation
ltc3207/ltc3207-1 14 3207fc acknowledge the acknowledge signal is used for handshaking between the master and the slave. an acknowledge (active low) generated by the slave (ltc3207/ltc3207-1) lets the mas- ter know that the latest byte of information was received. the acknowledge-related clock pulse is generated by the master. the master releases the sda line (high) during the acknowledge clock cycle. the slave-receiver must pull down the sda line during the acknowledge clock pulse so that it remains a stable low during the high period of this clock pulse. slave address the ltc3207 responds to only one 7-bit address which has been factory programmed to 0011011. the ltc3207-1 responds to only one 7-bit address which has been factory programmed to 0011010. the eighth bit of the address byte (r/w) must be 0 for the ltc3207/ltc3207-1 to recognize the address since it is a write-only device. this effectively forces the address to be 8 bits long where the least signi? cant bit of the address is 0. if the correct seven bit address is given but the r/w bit is 1, the ltc3207/ ltc3207-1 will not respond. bus write operation the master initiates communication with the ltc3207/ ltc3207-1 with a start condition and a 7-bit address followed by the write bit r/w = 0. if the address matches that of the ltc3207/ltc3207-1, the device returns an acknowledge. the master should then deliver the most signi? cant sub-address byte for the data register to be written. again, the ltc3207/ltc3207-1 acknowledge and then the data is delivered starting with the most sig- ni? cant bit. this cycle is repeated until all of the required data registers have been written. any number of data registers can be written. each data byte is transferred to an internal holding latch upon the return of an acknowl- edge. after all data bytes have been transferred to the ltc3207/ltc3207-1, the master may terminate the communication with a stop condition. alternatively, a repeat-start condition can be initiated by the master and another chip on the i 2 c bus can be addressed. this cycle can continue inde? nitely and the ltc3207/ltc3207-1 will remember the last input of valid data that they receive. once all chips on the bus have been addressed and sent valid data, a global stop condition can be sent and the ltc3207/ltc3207-1 will update all registers with the data that it had received. in certain circumstances the data on the i 2 c bus may become corrupt. in these cases the ltc3207/ltc3207-1 respond appropriately by preserving only the last set of complete data that they have received. for example, assume the ltc3207/ltc3207-1 have been successfully addressed and are receiving data when a stop condition mistakenly occurs. the ltc3207/ltc3207-1 will ignore this stop condition and will not respond until a new start condi- tion, correct address, sub-address and new set of data and stop condition are transmitted. likewise, if the ltc3207/ltc3207-1 were previously ad- dressed and sent valid data but not updated with a stop , they will respond to any stop that appears on the bus with only one exception, independent of the number of repeat-starts that have occurred. if a repeat-start is given and the ltc3207/ltc3207-1 successfully acknowl- edge their address and ? rst byte, they will not respond to a stop until all bytes of the new data have been received and acknowledged. quick write registers reg1 to reg12 can be written in parallel by set- ting bit 1 of reg0 high. when this bit is set high the next write sequence to reg1 will write the data to reg1 through reg12 which is all of the universal led registers. operation
ltc3207/ltc3207-1 15 3207fc v bat , cpo capacitor selection the style and value of the capacitors used with the ltc3207/ ltc3207-1 determine several important parameters such as regulator control loop stability, output ripple, charge pump strength and minimum start-up time. to reduce noise and ripple, it is recommended that low equivalent series resistance (esr) ceramic capacitors are used for both c vbat and c cpo . tantalum and aluminum capacitors are not recommended due to high esr. the value of c cpo directly controls the amount of output ripple for a given load current. increasing the size of c cpo will reduce output ripple at the expense of higher start-up current. the peak-to-peak output ripple of the 1.5x mode is approximately given by the expression: vi fc ripplep p out osc cpo ? = 3 where f osc is the ltc3207/ltc3207-1s oscillator fre- quency, or typically 850khz, and c cpo is the output stor- age capacitor. the output ripple in 2x mode is very small due to the fact that load current is supplied on both cycles of the clock. both style and value of the output capacitor can signi? - cantly affect the stability of the ltc3207/ltc3207-1. as shown in the block diagram, the device uses a control loop to adjust the strength of the charge pump to match applications information the required output current. the error signal of the loop is stored directly on the output capacitor. the output capacitor also serves as the dominant pole for the control loop. to prevent ringing or instability, it is important for the output capacitor to maintain at least 3.2f of capacitance over all conditions and the esr should be less than 80m. multilayer ceramic chip capacitors typically have exception- al esr performance. mlccs combined with a tight board layout will result in very good stability. as the value of c cpo controls the amount of output ripple, the value of c vbat controls the amount of ripple present at the input pin(v bat ). the ltc3207/ltc3207-1s input current will be relatively constant while the charge pump is either in the input charg- ing phase or the output charging phase but will drop to zero during the clock nonoverlap times. since the nonoverlap time is small (~25ns), these missing notches will result in only a small perturbation on the input power supply line. note that a higher esr capacitor such as tantalum will have higher input noise due to the higher esr. there- fore, ceramic capacitors are recommended for low esr. input noise can be further reduced by powering the ltc3207/ltc3207-1 through a very small series inductor as shown in figure 4. a 10nh inductor will reject the fast current notches, thereby presenting a nearly constant- current load to the input power supply. for economy, the 10nh inductor can be fabricated on the pc board with about 1cm (0.4") of pc board trace. 3207 f04 gnd ltc3207/ ltc3207-1 v bat figure 4. 10nh inductor used for input noise reduction (approximately 1cm of board trace)
ltc3207/ltc3207-1 16 3207fc flying capacitor selection warning: polarized capacitors, such as tantalum or aluminum, should never be used for the ? ying capaci- tors since their voltage can reverse upon start-up of the ltc3207/ltc3207-1. ceramic capacitors should always be used for the ? ying capacitors. the ? ying capacitors control the strength of the charge pump. in order to achieve the rated output current it is necessary to have at least 1.6f of capacitance for each of the ? ying capacitors. capacitors of different materials lose their capacitance with higher temperature and voltage at different rates. for example, a ceramic capacitor made of x7r material will retain most of its capacitance from C40c to 85c whereas a z5u or y5v style capacitor will lose considerable capacitance over that range. z5u and y5v capacitors may also have a very poor voltage coef? cient causing them to lose 60% or more of their capacitance when the rated voltage is applied. therefore, when comparing different capacitors, it is often more appropriate to compare the amount of achievable capacitance for a given case size rather than comparing the speci? ed capacitance value. for example, overrated voltage and temperature conditions, a 1f, 10v, y5v ceramic capacitor in a 0603 case may not provide any more capacitance than a 0.22f, 10v, x7r available in the same case. the capacitor manufacturers data sheet should be consulted to determine what value of capacitor is needed to ensure minimum capacitances at all temperatures and voltages. table 1 shows a list of ceramic capacitor manufacturers and how to contact them: table 1. recommended capacitor vendors avx www.avxcorp.com kemet www.kemet.com murata www.murata.com taiyo yuden www.t-yuden.com vishay www.vishay.com layout considerations and noise the ltc3207/ltc3207-1 have been designed to minimize emi. however due to the high switching frequency and the transient currents produced by the ltc3207/ltc3207-1, careful board layout is necessary. a true ground plane and short connections to all capacitors will improve performance and ensure proper regulation under all conditions. the ? ying capacitor pins, c1p, c2p, c1m and c2m, will have 5ns to 10ns edge-rate waveforms. the large dv/dt on these pins can couple energy capacitively to adjacent pcb runs. magnetic ? elds can also be gen- erated if the ? ying capacitors are not close to the ltc3207/ltc3207-1 (i.e., the loop area is large). to decouple capacitive energy transfer, a faraday shield may be used. this is a grounded pcb trace between the sensitive node and the ltc3207/ltc3207-1 pins. for a high quality ac ground, it should be returned to a solid ground plane that extends all the way to the ltc3207/ltc3207-1. applications information
ltc3207/ltc3207-1 17 3207fc power ef? ciency to calculate the power ef? ciency ( ) of an led driver chip, the led power should be compared to the input power. the difference between these two numbers represents lost power whether it is in the charge pump or the cur- rent sources. stated mathematically, the power ef? ciency is given by: = p p led in the ef? ciency of the ltc3207/ltc3207-1 depends upon the mode in which they are operating. recall that the ltc3207/ltc3207-1 operate as pass switches, connect- ing v bat to cpo, until dropout is detected at the i led pin. this feature provides the optimum ef? ciency available for a given input voltage and led forward voltage. when it is operating as a switch, the ef? ciency is approximated by: = = = p p vi vi v v led in led led bat bat led bat   since the input current will be very close to the sum of the led currents. at moderate to high output power, the quiescent current of the ltc3207/ltc3207-1 is negligible and the expres- sion above is valid. once dropout is detected at any the led pin, the ltc3207/ ltc3207-1 enable the charge pump in 1.5x mode. in 1.5x boost mode, the ef? ciency is similar to that of a linear regulator with an effective input voltage of 1.5 times the actual input voltage. this is because the input current for a 1.5x charge pump is approximately 1.5 times the load current. in an ideal 1.5x charge pump, the power ef? ciency would be given by: ideal led in led led bat led led p p vi vi v == =  . 15 1 ..  5v bat similarly, in 2x boost mode, the ef? ciency is similar to that of a linear regulator with an effective input voltage of 2x the actual input voltage. in an ideal 2x charge pump, the power ef? ciency would be given by: ideal led in led led bat led led p p vi vi v v == =    22 b bat thermal management for higher input voltages and maximum output current, there can be substantial power dissipation in the ltc3207/ ltc3207-1. if the junction temperature increases above approximately 150c the thermal shutdown circuitry will automatically deactivate the output current sources and charge pump. to reduce maximum junction temperature, a good thermal connection to the pc board is recom- mended. connecting the exposed pad to a ground plane and maintaining a solid ground plane under the device will reduce the thermal resistance of the package and pc board considerably. applications information
ltc3207/ltc3207-1 18 3207fc typical applications c1p c1m c2p c2m v bat v bat dv cc dv cc scl/sda enu camhl cpo uled1-12 cam gnd ltc3207/ltc3207-1 12 main fun lights cam enable disable low hi i 2 c 3207 ta03 c4 4.7f c1 2.2f c5 0.1f c3 2.2f c2 2.2f 6-led main, 6-led fun lights plus low/high camera light
ltc3207/ltc3207-1 19 3207fc information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package description uf package 24-lead plastic qfn (4mm 4mm) (reference ltc dwg # 05-08-1697) 4.00 0.10 (4 sides) note: 1. drawing proposed to be made a jedec package outline mo-220 variation (wggd-x)?to be approved 2. drawing not to scale 3. all dimensions are in millimeters 4. dimensions of exposed pad on bottom of package do not include mold flash. mold flash, if present, shall not exceed 0.15mm on any side, if present 5. exposed pad shall be solder plated 6. shaded area is only a reference for pin 1 location on the top and bottom of package pin 1 top mark (note 6) 0.40 0.10 24 23 1 2 bottom view?exposed pad 2.45 0.10 (4-sides) 0.75 0.05 r = 0.115 typ 0.25 0.05 0.50 bsc 0.200 ref 0.00 ? 0.05 (uf24) qfn 0105 recommended solder pad pitch and dimensions 0.70 0.05 0.25 0.05 0.50 bsc 2.45 0.05 (4 sides) 3.10 0.05 4.50 0.05 package outline pin 1 notch r = 0.20 typ or 0.35 45 chamfer
ltc3207/ltc3207-1 20 3207fc linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2007 lt 0807 rev c ? printed in usa related parts typical application part number description comments ltc3201 low noise, 1.7mhz regulated charge pump white led driver up to 6 white leds, v in : 2.7v to 4.5v, v out(max) = 5v, i q = 6.5ma, i sd 1a, 10-lead ms package ltc3202 low noise, 1.5mhz regulated charge pump white led driver up to 8 white leds, v in : 2.7v to 4.5v, v out(max) = 5v, i q = 5ma, i sd 1a, 10-lead ms package ltc3205 multidisplay led controller 92% ef? ciency, v in : 2.8v to 4.5v, i q = 50a, i sd 1a, 4mm 4mm qfn package ltc3206 i 2 c multidisplay led controller 92% ef? ciency, 400ma continuous output current; up to 11 white leds in 4mm 4mm qfn package ltc3208 high current software con? gurable multidisplay led controller 95% ef? ciency, v in : 2.9v to 4.5v, 1a output current; up to 17 leds for 5 displays, 5mm 5mm qfn package ltc3209 600ma main/camera led controller up to 8 leds, 94% ef? ciency, v in : 2.9v to 4.5v, 1x/1.5x/2x boost modes, 4mm 4mm qfn package ltc3210/ ltc3210-1 500ma main/camera led controller up to 5 leds, 95% ef? ciency, v in : 2.9v to 4.5v, 1x/1.5x/2x boost modes, exponential brightness control, -1 version has 64-step linear brightness control, 3mm 3mm qfn package ltc3210-2 main/cam led controller with 32-step brightness control drives 4 main leds, 3mm 3mm qfn package ltc3210-3 main/cam led controller with 32-step brightness control drives 3 main leds, 3mm 3mm qfn package ltc3214 500ma camera led charge pump 93% ef? ciency, v in : 2.9v to 4.4v, 1x/1.5x/2x boost modes, 3mm 3mm dfn package ltc3215 700ma high current, low noise, white led driver 93% ef? ciency, v in : 2.9v to 4.4v, 1x/1.5x/2x boost modes, 3mm 3mm dfn package ltc3216 1a high current, low noise, white led driver 93% ef? ciency, v in : 2.9v to 4.4v, 1x/1.5x/2x boost modes, independent low/high current programming ltc3217 600ma low noise multi-led camera light charge pump up to 4 leds, 92% ef? ciency, v in : 2.9v to 4.5v, 1x/1.5x/2x boost modes, independent torch and flash i set and enable pins, 3mm 3mm qfn package ltc3218 400ma single wire camera led charge pump 91% ef? ciency, v in : 2.9v to 4.5v, 1x/2x boost modes, high side current sense, 3mm 2mm dfn package lt3465/ lt3465a 1.2mhz/2.4mhz white led boost converters with internal schottky up to 6 white leds, v in : 12.7v to 16v, v out(max) = 34v, i q = 1.9ma, i sd <1a, thinsot package thinsot is a trademark of linear technology corporation. c1p c1m c2p c2m v bat v bat dv cc dv cc scl/sda enu camhl cpo uled1-12 cam gnd ltc3207/ltc3207-1 12 main sub cam cam indicator rgb enable disable low hi i 2 c 3207 ta02 2 c4 4.7f c1 2.2f c5 0.1f c3 2.2f c2 2.2f 6-led main, 2-led sub, rgb, camera indicator plus low/high camera light


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